Echo canceller

Details Echo canceller Echo canceller

1992-03-10

1993-11-16

Chin, Wellington

Multiplex communications

Wide area network

Packet switching

379410, 379406, H04L 514, H04B 323

Patent

active

052630200

ABSTRACT:
In an echo canceller used in a four-wire digital telephone circuit, a main echo estimator (21) and a sub echo estimator (22) are coupled with a receive path for measuring a receive signal, and subtracters (25, 26) are inserted in a transmit path for cancelling an echo component in a transmit signal. Filter coefficients in said estimators (21, 22) are adaptively controlled by a convergence control processor (24). The main echo estimator has a small step gain for updating filter coefficients so that the response to an echo is slow, while the sub echo estimator (22) has a large step gain and quick response for an echo. An register accumulator (23) is provided so that the filter coefficients by the sub echo estimator (22) are selectively accumulated on the related filter coefficients in the main echo estimator (21) according to operation modes, ordinary mode, accumulating mode, and reset mode. In an ordinary mode, said two echo estimators (21, 22) operate independently from each other, updating the filter coefficients. In an accumulating mode, when an echo output of the second subtracter (26) is lower than that of the first subtracter (25), and the filter coefficients in the sub echo estimator (22) converge, the filter coefficients in the sub echo estimator (22) are accumulated on the related ones in the main echo estimator (21), respectively, and after reset of the coefficients in the sub echo estimator (22), the mode is then switched to the ordinary mode. When the filter coefficients in the sub echo estimator (22) diverge, or echo output of the second subtracter (26) is larger than that of the first subtracter (25), the sub echo estimator (22) is reset, and then, the mode is switched to the ordinary mode.

REFERENCES:
patent: 4817081 (1989-03-01), Wouda et al.
patent: 4868874 (1989-09-01), Takatori et al.
patent: 4922530 (1990-05-01), Kenney et al.
patent: 4965823 (1990-10-01), Nakagawa et al.
patent: 4972467 (1990-11-01), Nakagawa et al.
patent: 5029167 (1991-07-01), Arnon et al.
"A Cascadable VLSI Echo Canceller", Tao et al, IEEE Journal on Selected Areas in Communications, vol. SAC-2, No. 2, Mar. 1984, pp. 297-303.
"Echo Canceler with Two Echo Path Models", Ochiai et al, IEEE Transactions on Communications, vol. COM-25, No. 6, Jun. 1977, pp. 589-595.

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