Echo beam former for an ultrasonic diagnostic apparatus

Surgery – Truss – Pad

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Details

73626, A61B 800

Patent

active

054172179

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to an echo beam former for an ultrasonic diagnostic apparatus and, more particularly, to an echo beam former incorporating improvements for improving picture quality.


BACKGROUND ART

An ultrasonic diagnostic apparatus sends ultrasonic signals into an object by an ultrasonic probe, receives reflected ultrasonic signals reflected by the internal structure, such as a lesion, of the object by the ultrasonic probe and displays a tomographic picture formed by processing the reflected ultrasonic signals on a CRT for diagnosis.
Recently, an ultrasonic diagnostic apparatus capable of large-aperture transmission and reception to improve the picture quality of a B mode picture of a deep part of the object has been developed.
Large-aperture transmission and reception entails a remarkable change in the B mode picture due to irregular sonic velocity distribution in the organism, which will be described hereinafter with reference to FIG. 6 showing the ultrasonic receiver and associated components of a conventional ultrasonic diagnostic apparatus, in which the ultrasonic transmitter is omitted.
In FIG. 6, indicated at 1 is a probe which transmits and receives ultrasonic radiation and at 2 is a target in an object. An ultrasonic beam is applied to the target 2 and signals representing the reflected ultrasonic radiation are processed to display a picture of the target 2. The probe 1 has an array of a plurality of vibrators. An ultrasonic radiation receiving aperture is formed of N+1 vibrators among the array of vibrators. The value N+1 is, for example, 128; the 128 vibrators forms a large aperture.
Signals of N+1 channels, i.e., channels Nos. 0 to N, are amplified by N+1 preamplifiers 4, the amplified signals are delayed by a predetermined delay by a delay circuit 5 for phasing, and then an adder 6 adds the phased signals to provide the sum of phased signals. Beam forming conforming to a predetermined azimuth and/or focal point is achieved by such phasing and adding processes. The direction of the ultrasonic beam is changed sequentially to scan a desired region within the object.
A nonlinear amplifier 7 compresses and amplifiers the output of the adder 6, i.e., the phased and added signal, so that the dynamic range of the output of the adder 6 matches the dynamic range of the subsequent circuit. An envelop detector 8 detects the output of the nonlinear amplifier 7, an A/D converter 9 converts the output of the envelop detector 8 into a corresponding digital signal, a digital scan converter (DSC) 10 converts the digital signal into a corresponding signal of a television mode, and then a CRT 11 displays a picture represented by the output of the DSC 10.
Problems caused in the circuit shown in FIG. 6 by the probe 1 having a large aperture will be described with reference to FIG. 7, in which each of the delay circuit and the adder in a block A surrounded by alternate long and short dash lines in FIG. 6 is divided into two equal sections respectively for two sections of the aperture of the probe 1 demarcated by a center line. In FIG. 7, parts corresponding to those shown in FIG. 6 are denoted by the same reference characters. The delay circuit 5 is divided into a delay circuit A 12 and a delay circuit B 13, and the adder 6 is divided into an adder A 14 and an adder B 15 in the front half and an adder C 16 in the rear half. The adder C 16 adds the respective outputs of the adder A 14 and the adder B 15. The delay circuit A 12, the delay circuit B 13 and the adder A 14, the adder B 15 and the adder C 16 constitute an echo beam former 17. In this echo beam former 17, signals of the channels Nos. 0 to {(N+1)/2} are applied to the delay circuit A 12, and signals of the {(N+1)/2}-th channels to N-th channels are applied to the delay circuit B 13.
The adder A 14 adds the output signals of the delay circuit A 12, and the adder B 15 adds the output signals of the delay circuit B 13. The adder C 16 adds the output a of the adder A 14 and the output b of the adder B 15 and provides an output

REFERENCES:
patent: 4793184 (1988-12-01), Ikeda et al.
patent: 4974558 (1990-12-01), Katakura et al.
patent: 5129399 (1992-07-01), Hirama

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