ECC-compare path of cache directory logic improvements

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G06F 1100

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058223380

ABSTRACT:
Directory compare and ECC logic which is interfaced with the array's static and dynamic outputs for the ECC-compare path of a cache directory, using a three-output array providing a static output and a pair of complementary dynamic outputs. The static output is useed by the compare logic for a directory compare. The pair of complementary dynamic outputs provide dynamic signals (t and f) to drive the ECC logic only as ECC logic complementary signals which are coupled to drive a DCVS (Dynamic Cascode Voltage Switch) syndrome generator circuit. The static output signal performs compare-then-correct processing. The dynamic signals of each bit emanating from array are ECC checked but the static signal is not. The static signal is consistent with the t dynamic signal.

REFERENCES:
patent: 5659551 (1997-08-01), Huott et al.
patent: 5661732 (1997-08-01), Lo et al.
"Pseude-Cache-Based Architecture" IBM Technical Disclosure Bulletin, vol. 34, No. 7A, Dec. 1991, pp. 481-485.
"Pipelined Cache Design for High Reliability" IBM Technical Disclosure Bulletin, vol. 37, No. 7, Jul. 1994, pp. 73-79.
"Associative Scheme for Cache Coherence in Multi-Processors" IBM Technical Disclosure Bulletin, vol. 39, No. 5, May 1996, pp. 153-156.

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