Easily schedulable horizontal computer

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Details

364900, 364736, G06F 1531, G06F 1302, G06F 938

Patent

active

045532036

ABSTRACT:
A computer system employing horizontal architecture and having multiple resources of which the use must be scheduled in an optimum manner. Scheduling is reduced to a mechanical task by the use of an interconnect circuit having multi-word storage capability at each of a plurality of cross-points providing data flow paths between the computer resources. At each cross-point of the interconnect circuit, data may be written into a selected location and retrieved from a selected location. Writing may be accomplished by an insertion operation in which already stored data is shifted to vacate the location selected for writing. Likewise, reading can be accompanied by a purge operation in which already stored data is shifted into the location from which data is purged. In this manner, each cross-point can function as a time delay in a data path, to facilitate scheduling of resource usage.

REFERENCES:
patent: 3287702 (1966-11-01), Brock, Jr. et al.
patent: 3308436 (1967-03-01), Brock, Jr. et al.
patent: 3786432 (1974-01-01), Woods
patent: 4310879 (1983-01-01), Pandeya
patent: 4412304 (1983-10-01), Yamakita

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