Easily manufacturable compact EPROM

Details Easily manufacturable compact EPROM Easily manufacturable compact EPROM

1992-03-04

1994-07-05

LaRoche, Eugene R.

Static information storage and retrieval

Floating gate

Particular biasing

365900, 257315, G11C 1134

Patent

active

053273788

ABSTRACT:
An EPROM array comprises a plurality of floating gate memory cell transistors and a multiplicity of floating gate select transistors arranged so that at least one select transistor controls the current to a group of floating gate memory cell transistors. Each floating gate select transistor remains unprogrammed or substantially unprogrammed even though the floating gate memory cell transistors in the memory array are selectively programmed to store information. The use of floating gate transistors for both memory cell transistors and select transistors simplifies the manufacturing process and improves yield.

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M. Okada et al., "16Mb ROM Design Using Bank Select Architecture," Symposium on VLSI Circuits, Tokyo, Japan, Aug. 22-24, 1988, Digest of Technical Papers, pp. 85-86.

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