Early failure detection system for multiprocessor system

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371 9, G06F 1122

Patent

active

048398950

ABSTRACT:
An early failure detection system for a multiprocessor system has a plurality of central processing units. When an idling central processing unit is detected by a microprogram stored in a control memory or a control memory controller, a test program for testing the idling central processing unit is executed before the idling central processing unit becomes busy. The test program is read out from a main memory and is executed using a register, an arithmetic circuit, an instruction advance fetching and decoding circuit, a main memory access control circuit, and the like. If a hardware failure of the idling central processing unit occurs during execution of the test program, the failed central processing unit is separated from the system so that the system can continue operation.

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patent: 4703446 (1987-10-01), Momose

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