Dynamically producing an effective impedance of an output...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S391000, C327S401000, C326S027000, C326S087000

Reexamination Certificate

active

06600347

ABSTRACT:

TECHNICAL FIELD
The present invention relates to the field of output drivers, and more particularly to producing an effective impedance of the output driver with a bounded variation during state transitions that sufficiently reduces a reflection coefficient below a predetermined value thereby reducing jitter by reducing reflections on the transmission line.
BACKGROUND INFORMATION
Microprocessor core fabrication technology is still evolving rapidly, and advancing at a much faster rate than fabrication technology of other devices. Device geometries within the core logic of microprocessors are shrinking, and power supply voltages must be lowered to accommodate small device geometries. Current silicon technology, using CMOS (Complementary Metal Oxide Semiconductor) transistors, has reduced the required junction threshold voltage to approximately zero volts. The current low voltage logic standards are 1.8 volts and 3.3 volts. Presently available ASIC (Application Specific Integrated Circuits) interface and support circuits have relatively high voltage requirements due to device geometries.
For example, it is possible for normal operating voltages in a microprocessor to range between zero volts and 1.8 volts, while normal operating voltages in other devices range between zero volts and 3.3 volts. In such a situation, a logic one state is represented by 1.8 volts in the microprocessor and by 3.3 volts in the other devices. In either case, a logic zero state is represented by zero volts.
Presently, in order to communicate a logic high state between the processor and other devices, system busses transfer a signal of, nominally, 3.3 volts for a logic one. For this reason, the processor includes driver circuitry for translating a 1.8 volt logic high signal from the core logic within the microprocessor into a 3.3 volt signal for communicating a logic high through the system bus. Likewise, the microprocessor includes driver circuitry for translating a 3.3 volt logic high signal from the system bus into a 1.8 volt logic high signal for use elsewhere within the microprocessor. Such driver circuitry may commonly be referred to as an output driver.
Conventional output drivers may interface with various input/output (I/O) devices such as ASICs, SRAMs (Static Random Access Memories), etc. A bus, which is a transmission line, may couple the output driver with the I/O device. In conventional output drivers, data may be transmitted at a single data rate. That is, output drivers may transmit one bit per cycle on the bus to the I/O device. When the output driver is ready to transmit another bit on the bus to the I/O device, the current in the bus may have been eliminated. Since there may be no current in the bus, there may not be a reflection of the data signal.
However, if output drivers transmit data at a higher data rate, i.e., at a rate of multiple bits per cycle, on the bus to an I/O device, reflections may occur. Since more than one bit per cycle is being transmitted on the bus, the current in the bus may not be eliminated prior to the output driver transmitting another data signal. Subsequently, the data signal may be reflected from the I/O device towards the output driver. The reflected data signal may not be terminated at the output driver end since the effective impedance of the output driver may appear to be substantially higher than the characteristic impedance of the bus, i.e., the transmission line, during the transition of the output driver, i.e., when the output driver switches from high to low or from low to high. Thus, the reflection coefficient may approach the value of one so that all of the energy in the reflected data signal gets reflected back towards the I/O device. That is, the reflected data signal may not be terminated but reflected back to the I/O device.
When the reflected data signal gets reflected back against the I/O device, Inter-Symbol Interference (ISI) may be said to occur. ISI may refer to the reflective noise on the cycle interfering with the next cycle or cycles. Subsequently, the data signal may become distorted where the distortion of this type may commonly be referred to as jitter.
However, if the effective impedance of the output driver appears finite so that the reflection coefficient is sufficiently less than one, then the reflected data signal may be terminated and hence jitter may be reduced.
It would therefore be desirable to produce an effective impedance of the output driver during state transitions that does not appear to be substantially greater than the bus characteristic impedance, i.e., appears to have a bounded variation, thereby reducing jitter by reducing reflections on the transmission line. That is, it would be desirable to produce an effective impedance of the output driver with a bounded variation during state transitions that reduces the reflection coefficient below a predetermined value so that the reflections on the transmission line may be reduced thereby reducing jitter.
SUMMARY
The problems outlined above may at least in part be solved in some embodiments by allowing a portion of the current to flow from a pull-up driver through the impedance of the output stage of the driver to a pull-down driver thereby causing the effective impedance of the driver to not appear to be substantially higher than the characteristic impedance of a bus thereby reducing jitter. That is, the variation of the effective impedance of the driver may be bounded during state transitions thereby producing a reflection coefficient that is below a predetermined value. When the reflection coefficient is less than a predetermined value, then a signal reflected from a receiver, coupled to the driver via a bus, may be terminated at the driver. That is, when the reflection coefficient is less than a predetermined value, then not all of the energy in the reflected signal gets reflected back towards the receiver. The predetermined value may establish the maximum tolerable jitter.
In one embodiment of the present invention, a driver may be coupled to a receiver, e.g., Input/Output (I/O) device, via a bus. The driver may be configured to receive a data signal that results in the driver driving a pad to a logic high voltage level, referred to as a logic 1, or to a logic low voltage level, referred to as a logic 0. The pad may refer to an interface between circuitry external and internal to a driver. The driver may comprise slew rate controllers configured to control the slew, i.e., rate, at which the pad switches. The driver may further comprise two series connected pull drivers, a pull-up driver and a pull-down driver. The pull-up driver may be configured to drive the pad to a logic high voltage level; whereas, the pull-down driver may be configured to drive the pad to a logic low voltage level.
Both the pull-up driver and the pull-down driver may comprise a plurality of segmented transistors. In the pull-up driver, the transistors may be switched from a first state, e.g., deactivated state, to a second state, e.g., activated state, in a staggered fashion where the first state is complementary to the second state. That is, each transistor may be switched to the second state at a different point in time. In the pull-down driver, the transistors may be switched from a second state, e.g., activated state, to a first state, e.g., deactivated state, in a staggered fashion. That is, each transistor may be switched to the first state at a different point in time.
Each transistor in the pull-up driver may be associated with a particular transistor in the pull-down driver. Upon switching a particular transistor in the pull-up driver to the second state, the associated transistor in the pull-down driver may switch to the first state at substantially the same time. By staggering the switching of the transistors to the second state in the pull-up driver and hence staggering the switching of the transistors to the first state in the pull-down driver, a portion of the current may flow from the pull-up driver through the impedance of the output stage of the driver and then through the p

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