Dynamically controlled interleaving

Details Dynamically controlled interleaving Dynamically controlled interleaving

1986-04-09

1988-04-26

Harkcom, Gary V.

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G06F 1202

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active

047409118

ABSTRACT:
A data processing system in which interleaving among memory controllers may be controlled. The interleaving is carried out on a double-word basis, and the state of the double-word address bit is used to select the bus address of the memory controller in which double-words having that address bit are stored. The dynamically controllable interleaving allows greater flexibility in the design of the memory controllers in a data processing system.

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patent: 4366539 (1982-12-01), Johnson et al.
Matick, Richard E.; "Computer Storage Systems and Technology"; John Wiley and Sons, 1977; pp. 339-341.

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