Dynamically controllable addressing in automatic test equipment

Details Dynamically controllable addressing in automatic test equipment Dynamically controllable addressing in automatic test equipment

1982-08-16

1984-10-30

Zache, Raulfe B.

Boots, shoes, and leggings

324 73AT, G06F 100

Patent

active

044803150

ABSTRACT:
In an automatic test system, a dynamically controllable addressing circuit coupled to an address bus and a data bus includes a first register 10 for storing a fixed address, a programmable address register 12 connected to store address information from the data bus when the fixed address in the first register corresponds to address information on the address bus, and a programmable data register 18 connected to store data from the data bus when the address information in the programmable address register 12 corresponds to the address information on the address bus. In the preferred embodiment the address bus and the first register are connected through an exclusive or gate 14 to control the operation of the programmable address register 12. A second exclusive or gate 16 is connected between the address bus and the programmable address register 12 to control the operation of the programmable data register 18.

REFERENCES:
patent: 3784910 (1974-01-01), Sylvan

Affiliated with

Also associated with

Rating

Dynamically controllable addressing in automatic test equipment does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamically controllable addressing in automatic test equipment, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamically controllable addressing in automatic test equipment will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1104810