Dynamically configurable signal processor and processor arrangem

Details Dynamically configurable signal processor and processor arrangem Dynamically configurable signal processor and processor arrangem

1990-11-09

1991-07-23

Shaw, Dale M.

Boots, shoes, and leggings

36472413, G06F 1531

Patent

active

050349074

ABSTRACT:
A programmable digital signal processor usable in a variety of configurations and controlled by stored coefficients and control words which are addressable to be provided to a plurality of processing sections as often as once per clock cycle. The processor arrangement is suitable for use as a decoder of multiple analog component (MAC) television signals.

REFERENCES:
patent: 3629509 (1971-12-01), Glasser
patent: 4389538 (1983-06-01), White
patent: 4393456 (1983-07-01), Marshall, Jr.
patent: 4450533 (1984-05-01), Petil et al.
patent: 4691292 (1987-09-01), Rothweiler
patent: 4701874 (1987-10-01), Akai et al.
patent: 4701956 (1987-10-01), Katoh
patent: 4777612 (1988-10-01), Tomimitsu
A 1-GOPS CMOS Programmable Video Signal Processor by Takao Yamazaki et al, 1989 IEEE International Solid State Circuits Conference, pp. 164-165 and 326.
Developments in Integrated Digital Signal Processors, and the PCB 5010 by J. L. van Meerbergen, Philips Technical Review, vol. 44, No. 1, Mar. 1988.

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