Dynamically boosted current source circuit

Details Dynamically boosted current source circuit Dynamically boosted current source circuit

1999-01-29

2001-03-20

Sterrett, Jeffrey (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

C323S299000

Reexamination Certificate

active

06204654

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of current sources, and particularly to current source circuits and methods used to charge capacitive nodes.
2. Description of the Related Art
There is some amount of capacitance associated with every node in an electronic circuit. The capacitance may take the form of, for example, a discrete circuit element, a capacitive load, or a parasitic capacitance. Regardless of its form, a circuit node's capacitance affects the speed with which a signal connected to it can transition from one state to another, because the node's capacitance must be charged (if the node's voltage is to increase) or discharged (if the voltage is decreasing) before the transition can occur. This capacitance-induced time lag may be unacceptably long, adversely affecting the performance of circuitry which is ideally fast-responding.
Various techniques are employed to charge and/or discharge node capacitance. An example is illustrated in
FIG. 1. A
transmitter device
10
sends a signal
12
to a receiver device
14
. A transmitter and a receiver often operate with different supply voltages. In such cases, a signal sent from transmitter to receiver is typically generated with an open drain or open collector transistor such as open-drain NMOS FET
16
, and then referenced to the receiver's supply voltage with a pull-up device
18
in the receiver.
As noted above, a capacitance is associated with every circuit node. In
FIG. 1
, a parasitic capacitance C
par
is found at the junction of FET
16
and pull-up device
18
. Transistor
16
can pull down signal
12
very rapidly, but when transistor
16
is off (indicating a “high” output), pull-up device
18
pulls up signal
12
. However, before signal
12
can rise, C
par
must be charged, and the time required to do this slows a low-to-high transition of signal
12
. For example, assume signal
12
is to transition from 0 to 3 volts (&Dgr;V=3 volts), pull-up device
18
provides 120 &mgr;A (i
pullup
), and C
par
is 10 pf. The transition time &Dgr;t is given by:
&Dgr;
t
=C
par
*(&Dgr;V/i
pullup
)=250 ns
Once received by receiver
14
, signal
12
is typically fed to a circuit
19
which detects a transition of signal
12
. However, if transition time &Dgr;t is too long, the response speed of detection circuit
19
can be slowed such that it cannot meet its performance requirements.
Pull-up device
18
is conventionally a resistor or a fixed current source. A resistive pull-up can result in a low-to-high transition that is unacceptably slow, because the current charging C
par
will decrease as the signal
12
voltage increases. A fixed current source avoids this problem, but also has a major drawback in low power applications: in circuits where low power consumption is important, idle current—i.e., the current consumed when the circuit's inputs are not changing—is preferably low. A fixed current source, however, wastes power by continuously providing current as signal
12
transitions from high to low, and while signal
12
is in its low state.
Another common capacitive node situation is shown in FIG.
2
. An operational amplifier
20
is driving a capacitive load C
load
at a node
22
. A typical op amp includes an input stage
24
and an output stage
26
. The input and output stages are biased from a fixed current source
28
. If op amp
20
is suddenly required to increase its output voltage, the capacitance at node
22
must be charged, typically at a specified speed. The current to charge C
load
comes from the output stage. However, the ability of the output stage to drive a load is limited by the fixed amount of bias current available from current source
28
to drive the output stage transistors. While a large current source
28
would reduce the transition time, the size of the current source is often limited to minimize the consumption of supply current. Limiting the bias current, however, also acts to limit the speed with which node
22
can be charged or discharged and the output voltage changed.
SUMMARY OF THE INVENTION
A dynamically boosted current source circuit and method are presented which overcome the problems noted above. The circuit and method improve the speed with which capacitive nodes can be charged or discharged without unduly increasing supply current demands, thereby improving the responsiveness of the circuits in which the capacitive nodes reside.
The present invention is useful in circuits which respond to a transitioning input signal, when an increase in the circuit's response speed is necessary or desirable. The circuit is such that its responsiveness varies in proportion to the amount of current delivered to an identified node; for example, the circuit may receive a bias current that allows it to respond to an input up to a maximum speed. A current source is connected to provide a bias current to the circuit, and a threshold detector is used to detect the occurrence of an input signal transition. The threshold detector's output is connected to the current source, which has at least two operating states. When no input signal transition has been detected, the current source is in a first state delivering a first bias current to the circuit. However, when the detector indicates the occurrence of a transition, the current source is triggered into its second state and provides a boosted bias current to the circuit. The boosted bias current is greater than the first bias current and, while present, improves the circuit's responsiveness by speeding the charging (or discharging) of capacitance present at the identified node, at another node driven by circuitry that includes the identified node, or both. Because bias current to the node is boosted in response to an external event (the transitioning of an input signal), the invention is referred to as a “dynamically boosted current source circuit”.
The identified node can be an input node—including the node which receives the transitioning input signal, an output node, an internal node, or any combination of these. The current source is arranged to provide the boosted current for a predetermined time interval (after which it returns to its first state), or until the input signal crosses a second threshold. In either case, the boosted current is only provided temporarily, in response to an input signal transition. As a result, response speed can be increased without a significant increase in supply current.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.


REFERENCES:
patent: Re. 30948 (1982-05-01), Schade
patent: 4539493 (1985-09-01), Varadarajan
patent: 5473270 (1995-12-01), Denker
patent: 5510754 (1996-04-01), Moraveji et al.
patent: 5675270 (1997-10-01), Huang

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