Dynamically biased current gain voltage regulator with low quies

Details Dynamically biased current gain voltage regulator with low quies Dynamically biased current gain voltage regulator with low quies

1998-02-04

1998-10-20

Wong, Peter S.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323314, 323350, G05F 316

Patent

active

058251693

ABSTRACT:
A voltage regulator circuit that minimizes the bias current flowing between a first voltage terminal and a second voltage terminal. The circuit receives input signals via a first and a second input terminal, and provides an output signal via an output terminal. The circuit includes a differential input stage, an output stage, a first sub-circuit for reducing the current flowing through the output stage between the first voltage terminal and the output terminal, and a second sub-circuit for reducing the current flowing through the output stage between the output terminal and the second input terminal. An alternative embodiment combines the power reduction circuitry with additional circuitry decoupling the input and output stages to provide enhanced design flexibility.

REFERENCES:
patent: 4319179 (1982-03-01), Jett, Jr.
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patent: 4906913 (1990-03-01), Stanojevic
patent: 4950975 (1990-08-01), Fleischer
patent: 5302888 (1994-04-01), Hellums et al.
patent: 5448156 (1995-09-01), Tsay
patent: 5493203 (1996-02-01), Dalton
patent: 5546042 (1996-08-01), Tedrow et al.
Dorf, Richard C., The Electrical Engineering Handbook, 1993 pp. 539-541.
Author Unknown, Title Unknown, Date of Publication pp. 341-344.

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