Dynamic voltage sense amplifier

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S057000, C327S064000

Reexamination Certificate

active

06268747

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a sense amplifier suitable for evaluating data stored in a matrix memory, and more particularly to a dynamic sense amplifier.
BACKGROUND OF THE INVENTION
Semiconductor memory arrays are conventionally classified into two types, namely read only memories (ROM) and random access memories (RAM) Random access memories are themselves sub-classified into two main types, namely static memories (SRAM) and dynamic memories (DRAM).
A majority of memory arrays of all types require the use of a so-called sense amplifier which responds either to the difference in potential on two complementary bit lines, or occasionally the difference between the potential on a single bit line and that on a reference bit line to evaluate the content of a particular memory location. Again, such sense amplifiers are classifiable into two types, namely static sense amplifiers—in which a direct current path exists between positive and negative supply terminals—and dynamic sense amplifiers—in which only transient paths exist for current flow.
As is known to those skilled in the art, evaluation of memory content usually takes place at specific instance of time related to a clock cycle in the system and the value which is sensed must be retained for a substantial period of time after such evaluation to allow for circuitry downstream of the memory to receive, and act upon, the correct values.
In conventional dynamic sense amplifiers a latch is provided, conventionally of cross-coupled NAND gates, to store the last value sensed by the sense amplifier until the time comes for a new value to be sensed and output to the latch.
Such an arrangement is wasteful of chip area and also slows down the performance of the memory since allowance must be made for two gate delays before the output has achieved a stable level.
It is accordingly an object of the present invention to provide a dynamic sense amplifier which at least partially mitigates the difficulties of the prior art.
It is a secondary object of the invention to provide a dynamic sense amplifier having an output which is capable of being rendered high impedance, thus adopting a tristate condition so as to avoid affecting downstream circuit elements.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention there is provided a sense amplifier circuit for sensing a potential difference between two input lines, and for adopting a first or second logic state in response to said potential difference being respectively positive or negative, the sense amplifier comprising a bistable circuit and a control circuit wherein the bistable circuit has a first and a second signal terminal connectable to the input lines, said first and second signal terminals constituting first and second output terminals of the sense amplifier said bistable circuit having a connection to one of a positive and negative supply and wherein said control circuit is operable in use to connect said bistable circuit to the other of said negative and positive supplies for operation thereof.
Preferably the sense amplifier further comprises a gating circuit connected between said input lines and the first and second signal terminals, said gating circuit having a control input for interrupting said connection.
Advantageously the control circuit has a control input for connecting said other of said negative and positive supplies for operation of said bistable circuit.
Conveniently said sense amplifier circuit further comprises a delaying inverter circuit connecting said control input of said control circuit to said control input of said gating circuit.
Preferably the bistable circuitry comprises a pair of cross-coupled CMOS inverters.
Advantageously the CMOS inverters comprise respective PMOS transistors having a connection to a positive supply rail and NMOS transistors having a connection to said control circuit for providing a negative supply thereto.
According to a second aspect of the present invention there is provided a method of operating a sense amplifier comprising:
connecting a sensing circuit to two input lines, whereby differential voltage on said input lines propagates to said sensing circuit;
disconnecting said input lines from said sensing circuit;
connecting said sensing circuit to a power supply whereby said sensing circuit latches; and maintaining said connection to said power supply thereafter;
wherein said power supply remains connected to said sensing circuit substantially at all times except when said input lines are connected to the sensing circuit.
Preferably said step of connecting said sensing circuit to a power supply is started before starting said step of disconnecting said input lines from said sensing circuit.


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