Dynamic voltage scaling for self-timed or racing paths

Details Dynamic voltage scaling for self-timed or racing paths Dynamic voltage scaling for self-timed or racing paths

2007-10-31

2009-11-24

Luu, An T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S298000

Reexamination Certificate

active

07622979

ABSTRACT:
A timing-constrained circuit (e.g., a self-timed circuit) of optimal performance is achieved by allowing the delay of the circuit to be changed dynamically as a function of operating conditions (e.g., operating voltages or temperatures). The delay of timing signals in the timing-constrained circuit for a given operating condition may be selected to have the minimum margin for that operating condition among the available delays to maximize performance over the entire dynamic range of operating conditions.

REFERENCES:
patent: 6510191 (2003-01-01), Bockelman
patent: 7349515 (2008-03-01), Chew et al.
patent: 2007/0045825 (2007-03-01), Chan et al.
patent: 2008/0079458 (2008-04-01), Shin et al.

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