Static information storage and retrieval – Addressing – Sync/clocking
Patent
1994-08-08
1998-10-13
Kulik, Paul V.
Static information storage and retrieval
Addressing
Sync/clocking
36523001, 36523009, 345507, 345509, 345515, 345191, 345516, 711104, 711105, G06F 1200, G11C 700, G11C 1134
Patent
active
RE0359211
ABSTRACT:
An architecture for a single chip dynamic video random access memory using a single clock to operate the random port to perform refresh, memory address, and to control the internal circuitry for inputting data and addresses and for outputting data as well as modifying information in the memory circuit chip having internal circuitry for performing drawing or replacement rule logical operations on an addressed line of stored video information In the RAM and further having the write masking circuitry for modifying selected portions of the line of stored video Information between selected START and STOP bit locations within the like.
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Harlin Roy E.
Herrington Richard A.
Kulik Paul V.
Matsushita Electric - Industrial Co., Ltd.
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