Communications: electrical – Digital comparator systems
Patent
1976-04-22
1977-08-23
Fears, Terrell W.
Communications: electrical
Digital comparator systems
340173CA, 340173FF, 307238, G11C 1140
Patent
active
040443426
ABSTRACT:
The dynamic type semiconductor memory device comprises a refresh circuit and a plurality of memory cells which are connected between a data input line and a data output line, a plurality of read/write command signal lines and a plurality of word selection lines provided for respective semiconductor memory cells. Each semiconductor memory cell comprises serially connected first p-channel MOS transistor and a second n-channel MOS transistor having gate electrodes connected to the read/write command signal line and the data input line respectively, a third p-channel MOS transistor connected between the data output line and the word selection line and having a gate electrode connected to the node between the first and second transistors, and a parasitic capacitance connected to the node between the first and second transistors for storing data.
REFERENCES:
patent: 3955181 (1976-05-01), Raymond
Ochii Kiyofumi
Suzuki Yasoji
Fears Terrell W.
Tokyo Shibaura Electric Co. Ltd.
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