Dynamic type semiconductor memory device

Static information storage and retrieval – Addressing – Plural blocks or banks

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365222, 365 63, G11C 700

Patent

active

061082643

ABSTRACT:
An ordinary read/write operation (normal operation) and a refresh operation are separated from one another and the number of read amplification circuits or, in other words, the number of sense amplifiers operating during the normal operation is made smaller than that during the refresh operation. Accordingly, a bit line charge/discharge current during the normal operation can be reduced.

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