Dynamic type semiconductor memory apparatus

Details Dynamic type semiconductor memory apparatus Dynamic type semiconductor memory apparatus

2006-11-07

2006-11-07

Elms, Richard (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S149000, C365S150000, C365S189050

Reexamination Certificate

active

07133303

ABSTRACT:
A dynamic type semiconductor memory apparatus performs an operation of continuous column access at a high speed while minimizing an increase of a chip size. The dynamic type semiconductor memory apparatus includes first and second memory cell groups divided based on a column address, a first bit line connected to the first memory cell group, a second bit line connected to the second memory cell group, first and second local data lines, and a column selection unit configured to connect the first and second bit lines to the first and second local data line based on a column address. The dynamic type semiconductor memory apparatus further includes first and second master data line, a local data line selecting unit configured to connect the first and second local data lines to the first and second master data lines, respectively, a DBR configured to read data from the first or second master data lines, and a DWB configured to write data to the first or second master data lines.

REFERENCES:
patent: 5886930 (1999-03-01), Maclellan et al.
patent: 6115318 (2000-09-01), Keeth
patent: 07-282583 (1995-10-01), None

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