Static information storage and retrieval – Addressing – Sync/clocking
Patent
1982-06-07
1984-10-09
Fears, Terrell W.
Static information storage and retrieval
Addressing
Sync/clocking
365189, G11C 1140
Patent
active
044765487
ABSTRACT:
A dynamic type MOS memory device comprises a plurality of word lines, selecting switch MOSFETs which are disposed in correspondence with the respective word lines, a control circuit for controlling the selecting switch MOSFETs, MOSFETs which are disposed between the respective word lines and the ground potential and which are used as resistance means, and an inverter circuit which receives timing signals to be applied to input side electrodes of the selecting switch MOSFETs and which supplies the MOSFETs as the resistance means with control signals for bringing these MOSFETs into "off" states.
The timing signal is brought into a supply voltage level substantially in synchronism with the completion of the operation of the control circuit.
Accordingly, a dynamic type MOS memory device whose operating speed has been rendered high can be provided.
REFERENCES:
patent: 4419739 (1983-12-01), Blum
Kazigaya Kazuhiko
Matsumoto Tetsurou
Fears Terrell W.
Hitachi , Ltd.
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