Dynamic type memory

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

36523008, 36523002, 36518905, 36518902, G11C 1300, G11C 1134

Patent

active

057128278

ABSTRACT:
In a dynamic type memory, a memory cell array is divided into a plurality of sub arrays on a memory chip. Each of the sub arrays is provided with a data line formed in parallel with word lines. Data buffer and multiplexer circuits and I/O pads are arranged on one side of the memory chip in parallel with bit lines. This arrangement allows a data path to be shortened and enables data to be transferred at high speed.

REFERENCES:
patent: 5027326 (1991-06-01), Jones
patent: 5126973 (1992-06-01), Gallia et al.
patent: 5204841 (1993-04-01), Chappell et al.
patent: 5251178 (1993-10-01), Chidlers
patent: 5377144 (1994-12-01), Brown
patent: 5459693 (1995-10-01), Komarek et al.
patent: 5519655 (1996-05-01), Greenberg

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