Image analysis – Image sensing
Reexamination Certificate
1999-05-28
2002-04-30
Grant, II, Jerome (Department: 2624)
Image analysis
Image sensing
C358S482000
Reexamination Certificate
active
06381378
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to scanning devices, and more particularly is a module used in conjunction with a CIS scanner to provide a dynamic threshold level for the scanned image.
BACKGROUND OF THE INVENTION
Current imaging technology has advanced to a state that scanning devices can be made that are physically quite compact and very inexpensive to manufacture. These systems, although simple in construction and inexpensive to manufacture, produce very accurate results. One of the innovations instrumental in the advancement of scanning technology is the use of full width CIS (Contact Image Sensor) systems. These systems greatly reduce the space requirements for a system, and provide superior reproduction of the images through the use of a linearly abutted hybrid sensor array.
FIG. 1
depicts a full width CIS system. Earlier scanning systems had to make use of an optical reduction system due to limited sensor width. In the full width system, the optical reduction system is replaced with a full-width rod/lens system. This system allows one-to-one scanning of the subject document because the rod lens and the image sensor array are of the same width as (or greater width than) the document to be scanned. This arrangement reduces the distance required between the image sensor and document being scanned to less than 2 cm, thereby allowing the construction of very compact units.
In the full-width CIS system, a light source (the LED bar) generates light that is reflected off the subject document. The reflected light is directed by a full-width rod lens onto a full-width sensor array. The individual sensors in the array are serially activated to detect light levels across an image line.
FIG. 2
is a schematic representation of the operation of the system illustrated in FIG.
1
. The system utilizes a plurality of individual sensor chips butted end-to-end on a single substrate. The number of individual sensor chips chosen is dependent upon the desired width and resolutions of scanning. In the system illustrated, 13 individual sensor chips, each with 96 sensing elements, are utilized. This array therefore yields 1,248 pixel elements per scanned line. The CIS system also comprises signal-processing means to serially activate the individual sensor chips and to process the output signals.
The construction and operation of the particular CIS module illustrated is described in further detail in assignee's co-pending applications—Ser. No. 08/928,913, “High-Density and High-Speed CIS Array”, filed Sep. 12, 1997; and Ser. No. 09/001,875, “Charge Storage Image Scanner Having Equalizing Pre-Charge and Reset Improvements”, filed Dec. 31, 1997. These applications are hereby incorporated by reference in their entirety, and thus the construction and operation of the scanning module are not discussed in further detail herein.
Scanning modules produced with the technology described above are quite efficient and very practical. This is particularly true when the module is being used to scan documents printed only in black and white. The output can then be generated with reference to a single background level (white), and the required storage capacity for the output signal is not too large to handle economically. However, when the documents to be scanned contain multiple colors and shades, the required storage can be prohibitive. When one considers that for an 8½×11 page scanned at 300 dpi there are nearly 8½ million bits of information required, data capacity considerations rapidly become very important.
One application that is particularly sensitive to size considerations is the remote transmission of scanned images. In applications such as this, the data to be transmitted must be compressed.
In addition to transmission applications, many other scanning applications would benefit from the ability to output compressed data. These applications are limited by the need for any add-on circuit to not only be physically small, but also to be inexpensive and to require very few output pins.
Accordingly, it is an object of the present invention to provide a circuit that processes analog output from a scanning device, and outputs compressed digital information for a scanned pixel.
It is a further object of the present invention to provide a circuit that requires very little space, and is easy and inexpensive to manufacture.
It is a still further object of the present invention to minimize component pin-out count for a module containing the circuit of the present invention.
SUMMARY OF THE INVENTION
The present invention is a dynamic threshold two-level A/D converter, or a tracking digitizer circuit. The module circuitry comprises a comparator circuit and a tracking low-pass filter circuit. The dynamic thresholding module takes the output signals from a CIS module and develops a tracking (variable) background signal. The tracking background signal is then compared to the output signals from the CIS in a comparator. The comparator outputs a two-level (binary) output digital signal. The function of the digitizer is illustrated in the schematic block diagram shown in FIG.
8
.
The current art digital processing techniques used to achieve results similar to those of the dynamic thresholding module are summarized in FIG.
9
. The advances represented by using the analog approach of the present invention versus digital techniques can be seen by comparing
FIGS. 8 and 9
. Because the signal is to be digitized, the input of the digital circuit requires an anti-alias filter and an A/D converter. In contrast, the analog implementation of the present invention requires neither of these components. Furthermore, the simple RC low-pass filter utilized in the circuitry of the dynamic thresholding module must be replaced by a complicated digital low-pass filter equivalent circuit. It consists of a digital adder and a delay storage memory with weighted feedback coefficients (used for band shaping the filters) that are connected by the feedback bus. The digital output of the low-pass filter is applied to the input bus of one of the digital signal inputs that serves as the reference for the digital comparator. The other input receives the digitized signal from the A/D converter. The two digital signals on both buses are compared and the resulting high or low output from the comparator is produced as a two-level digitized signal on a single output line with a ground return. Hence, the signal process is equivalent to the analog version, but with far more complexity than that of its analog counterpart.
The circuit of the present invention is designed to be used in conjunction with a scanning device, particularly a CIS system. The circuit can be used in a wide variety of applications that require pre-processed digitized video signals.
The dynamic thresholding module's circuitry can be implemented quite simply. Moreover, the circuit provides a very low cost and a low parts density module that can easily be incorporated with existing CIS modules without substantially increasing the size of the CIS module or the cost to manufacture the unit. The circuit requires roughly half the space required by existing digital circuits that accomplish similar ends.
An advantage of the present invention is that it converts the analog output of a CIS scanner into digital form through a simple process.
Another advantage of the present invention is that it can be contained in a module that requires very little space.
A still further advantage of the present invention is that it minimizes component pin-out count.
These and other objects and advantages of the present invention will become apparent to those skilled in the art in view of the description of the best presently known mode of carrying out the invention as described herein and as illustrated in the drawings.
REFERENCES:
patent: 4220972 (1980-09-01), Geokezas
patent: 4911552 (1990-03-01), Kurashige
patent: 4916744 (1990-04-01), Watanabe
patent: 5198771 (1993-03-01), Fidler
Tan Pheng
Tanaka Satoru C.
Tseng Hsin-Fu
Grant II Jerome
Peripheral Imaging Corporation
The Kline Law Firm
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