Dynamic test reordering

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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Details

738659, 738655, 324765, G01R 3128, G06F 1520

Patent

active

060781890

ABSTRACT:
A method of dynamically modifying a test program makes testing more efficient and less costly while avoiding errors from manual operations. In one embodiment the order of functional tests in the test program is dynamically changed based on the results of testing. Tests that have caused fails are moved earlier in the testing program without having to recompile the test program. Each functional test has an initialization step to set the chip in a state from which subsequent test vectors are run.

REFERENCES:
patent: 3781683 (1973-12-01), Freed
patent: 4728883 (1988-03-01), Green
patent: 4875002 (1989-10-01), Sakamoto et al.
patent: 4994732 (1991-02-01), Jeffrey et al.
patent: 5004978 (1991-04-01), Morris, Jr. et al.
patent: 5023557 (1991-06-01), Moran et al.
patent: 5654632 (1997-08-01), Ohno
"A Logic Design Strcuture for LSI Testing" E. Eichelberger & T. W. Williams, 14th Design Automation Conference, Jun. 1977, p. 462-468.

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