Pulse or digital communications – Repeaters – Testing
Patent
1992-07-08
1994-09-13
Chin, Stephen
Pulse or digital communications
Repeaters
Testing
375117, 370 48, H04L 2538
Patent
active
053475402
ABSTRACT:
An apparatus and method for dynamic memory allocation conserves memory resources while providing efficient and effective interaction between concurrent synchronous and asynchronous acquisition of data for logic analysis. The apparatus includes circuitry for acquiring synchronous data, circuitry for acquiring asynchronous data, circuitry for generating timestamp values, circuitry for determining when the synchronous data is valid, circuitry for determining when the asynchronous data is valid, and circuitry for packing valid synchronous data and valid asynchronous data into a memory according to the sequence in which it was acquired with sufficient timestamp values included to permit reconstruction of the relative timing between all of the acquired data, with each data and timestamp value being identified with status bits to indicate whether it was synchronous data, asynchronous data, or a timestamp value. The method of dynamic memory allocation includes the steps of acquiring synchronous data, acquiring asynchronous data, generating timestamp values, determining when the synchronous data is valid, also determining when the asynchronous data is valid, and packing valid synchronous data and valid asynchronous data into a memory according to the sequence in which it was acquired with sufficient timestamp values included to permit reconstruction of the relative timing between all of the acquired data, with each data and timestamp value being identified with status bits to indicate whether it was synchronous data, asynchronous data, or a timestamp value.
REFERENCES:
patent: 4048440 (1977-09-01), Peck et al.
patent: 4353032 (1982-10-01), Taylor
patent: 4512026 (1985-04-01), Vander Meiden
patent: 4586189 (1986-04-01), Tyrrell
patent: 4843255 (1989-06-01), Stuebing
patent: 4857760 (1989-08-01), Stuebing
patent: 4914675 (1990-04-01), Fedele
patent: 4949361 (1990-08-01), Jackson
patent: 5054020 (1991-10-01), Meagher
PM 3580 FAMILY Logic Analyzer Brochure (Philips) Fluke and Philips-The Global Alliance in Test & Measurement.
Chin Stephen
Griffith Boulden G.
Tektronix Inc.
LandOfFree
Dynamic storage allocation in a logic analyzer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic storage allocation in a logic analyzer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic storage allocation in a logic analyzer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1126081