Dynamic shift register using insulated-gate field-effect transis

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307224C, 307269, 307DIG4, G11C 1928

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active

040841065

ABSTRACT:
This dynamic two-phase clocked MOS shift register delivers the shifted signal in a non-inverted manner after half the clock pulse period and consists of six MOSFETs per stage.

REFERENCES:
patent: 3610951 (1971-10-01), Howland
patent: 3829711 (1974-08-01), Crowle
patent: 3909627 (1975-09-01), Mizuno
West, "Practical Circuit Design Using M.O.S.", Design Electronics, vol. 8, No. 6, pp. 30-32, 37, 38, 3/1971.
Boss et al., "Powering Delay Circuit", IBM Tech. Discl. Bull., vol. 16, No. 1, pp. 17-18, 6/1973.
Danielski et al., "Single Input Driver Circuit", IBM Tech. Disc. Bull., vol. 18, No. 4, pp. 1033-1034, 9/1975.
Chu et al., "Bootstrap Push-Pull Driver", IBM Tech. Discl. Bull., vol. 18, No. 3, pp. 710-711, 8/1975.

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