Dynamic semiconductor memory device with low power consumption m

Details Dynamic semiconductor memory device with low power consumption m Dynamic semiconductor memory device with low power consumption m

1999-01-29

2000-08-01

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 365222, 365201, 711170, 711106, G11C 800

Patent

active

060976624

ABSTRACT:
When memory storage capacity is required and power consumption is not so important, a semiconductor memory device is operated in a normal mode. When memory capacity is not so important and power consumption is to be suppressed, two memory cells are used connected in common to one bit line to store one data by rendering two word lines active at the same time. Accordingly, an operation of low power consumption with a longer refresh cycle is allowed. The user can appropriately switch between the two operation modes as necessary for usage.

REFERENCES:
patent: 5719815 (1998-02-01), Takahashi et al.
patent: 5867438 (1999-02-01), Nomura et al.

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