Dynamic semiconductor memory device with banks capable of operat

Details Dynamic semiconductor memory device with banks capable of operat Dynamic semiconductor memory device with banks capable of operat

1998-07-28

1999-10-19

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 36523008, 36518905, G11C 800

Patent

active

059700165

ABSTRACT:
Memory cell arrays are arranged on a chip. Each memory cell array has banks. Each bank has cell array blocks. A decoder section is concentrated in the middle of the chip. The decoder section has a row decoder, a word line drive circuit decoder for selecting a word line drive circuit, a sense amplifier decoder for selecting a sense amplifier, and an equalize signal decoder for selectively supplying an equalize signal. Each of these decoders outputs a select signal. The individual banks share the decoder section. Each bank has a latch circuit for latching a select signal in pulse form supplied from the decoder section and controls the memory blocks according to each select signal latched in the latch circuit. A shared sense amplifier is provided between memory blocks in each bank. A redundancy cell array is provided for each bank.

REFERENCES:
patent: 5671188 (1997-09-01), Patel et al.
patent: 5838603 (1998-11-01), Mori et al.

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