Dynamic semiconductor memory device having an improved sense amp

Static information storage and retrieval – Format or disposition of elements

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365 63, 365 72, 365205, 365208, G11C 502, G11C 11407, G11C 11413

Patent

active

056445253

ABSTRACT:
A dynamic semiconductor memory device is made up of a plurality of dynamic memory cells arrayed along a plurality of bit line pairs, and a plurality of dynamic sense amplifiers associated with the plurality of bit line pairs, each sense amplifier having a pair of MOS transistors connected to a corresponding pair of bit lines. In one embodiment, the first and second transistors of one of the sense amplifiers and the first and second transistors of another sense amplifier adjacent thereto are positioned within a region defined by two adjacent pairs of bit lines. Each of the bit line pairs has first and second bit lines extending in a first direction perpendicular to a second direction in which the source and drain regions are formed in the semiconductor substrate so that the transistors of the sense amplifiers are arranged one for every four bit lines in the second direction.

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