Dynamic semiconductor memory device

Static information storage and retrieval – Format or disposition of elements

Patent

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Details

365 63, 365206, 365214, C11C 502

Patent

active

056027729

ABSTRACT:
A dynamic semiconductor memory device according to the present invention, comprises a plurality of first bit lines, a plurality of second bit lines which are partially laminated above the first bit lines and, together with the first bit lines, form bit-line pairs to build a folded bit-line structure, a plurality of word lines arranged so as to cross the first bit lines and the second bit lines, and at least one memory cell array in which a plurality of memory cells connected to the first bit lines and the second bit lines are arranged in a matrix, wherein the memory cell array includes a plurality of first areas in which a plurality of memory cells are arranged, and a plurality of second memory areas which are arranged so as to alternate with the first areas and contain no memory cell, and the second memory areas include areas where the first bit lines of the specified number of the bit-line pairs are connected to the second bit lines and the second bit lines are connected to the first bit lines.

REFERENCES:
patent: 4922460 (1990-05-01), Furutani et al.
patent: 5396450 (1995-03-01), Takashima et al.

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