Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2006-05-09
2006-05-09
Nguyen, Steven (Department: 2665)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S428000, C370S230000
Reexamination Certificate
active
07042891
ABSTRACT:
A system and method for low latency switching of data packets in a network switch. A network switch may include multiple input ports, multiple output ports, and a shared random access memory coupled to the input ports and output ports by data transport logic. Under normal operation, the data transport logic stores packet data into the memory. Later, the packet data is read from the memory and output to a destination output port. To reduce latency when the switch is not congested, the switching logic may be configured to perform a cut-through operation by routing packets directly from input ports to output ports without storing any portion of the packet in the memory. Alternatively, the switch may begin forwarding the stored packet data to the output port before the entire packet has been received or stored in the memory.
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“Adaptec Announces EtherStorage Tachnology,” Adaptec, May 4, 2000, 2 pages.
Malik Kamran
Mehta Anil
Mullendore Rodney N.
Oberman Stuart F.
Hensley Kim & Edgington LLC
Nguyen Steven
Nishan Systems, Inc.
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