Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2006-10-31
2009-02-10
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C718S108000
Reexamination Certificate
active
07490223
ABSTRACT:
An apparatus and a method dynamically reassign resources in a coprocessor among master processors that require service from the coprocessor. The method includes each processor, in each processor cycle, keeping track of a number of resource units required for executing operations sent to the coprocessor in that processor cycle and receiving from the coprocessor a number of resource units released during the processor cycle. When the resources need to be reassigned, the coprocessor asserts a signal to the resource yielding processor to cause it to reduce its expectation of resources to zero and ceasing sending service requests to the coprocessor. The coprocessor then moves resources from the yielding processor to the resource receiving processor. Resources are then released to both processors over time to their respective adjusted resource allocations. Such resources may be the number of operations that is allowed to be executing in the coprocessor simulataneously. It may also be the number of physical registers that the processor can use in its operations sent to the coprocessor.
REFERENCES:
patent: 4992938 (1991-02-01), Cocke et al.
patent: 5218711 (1993-06-01), Yoshida
patent: 5251295 (1993-10-01), Ikenoue et al.
patent: 5642499 (1997-06-01), Ohba et al.
patent: 5655131 (1997-08-01), Davies
patent: 5684803 (1997-11-01), Nguyen Thuy
patent: 5708837 (1998-01-01), Handlogten
patent: 5748468 (1998-05-01), Notenboom et al.
patent: 5890010 (1999-03-01), Nishigami
patent: 6002881 (1999-12-01), York et al.
patent: 6789147 (2004-09-01), Kessler et al.
patent: 6928523 (2005-08-01), Yamada
patent: 7287147 (2007-10-01), Hudepohl et al.
patent: 2003/0023831 (2003-01-01), Deveruex
patent: 2003/0093648 (2003-05-01), Moyer
patent: 2004/0044878 (2004-03-01), Evans et al.
patent: 2004/0205389 (2004-10-01), Cho et al.
patent: 2005/0055594 (2005-03-01), Doering et al.
patent: 2006/0010305 (2006-01-01), Maeda et al.
patent: 2006/0161420 (2006-07-01), Sugawara
patent: 2006/0179273 (2006-08-01), Cole et al.
patent: 2006/0259800 (2006-11-01), Maejima
Favor John Gregory
Nelson Christopher P.
Alrobaye Idriss N
Chan Eddie P
Osha • Liang LLP
Sun Microsystems Inc.
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