Pulse or digital communications – Equalizers – Automatic
Reexamination Certificate
2004-08-06
2008-05-06
Ha, Dac V. (Department: 2611)
Pulse or digital communications
Equalizers
Automatic
C375S233000, C375S348000, C375S350000
Reexamination Certificate
active
07369608
ABSTRACT:
A method for dynamically regulating the power consumption of a high-speed integrated circuit which includes a multiplicity of processing blocks. A first metric and a second metric, which are respectively related to a first performance parameter and a second performance parameter of the integrated circuit, are defined. The first metric is set at a pre-defined value. Selected blocks of the multiplicity of processing blocks are disabled in accordance with a set of pre-determined patterns. The second metric is evaluated, while the disabling operation is being performed, to generate a range of values of the second metric. Each of the values corresponds to the pre-defined value of the first metric. A most desirable value of the second metric is determined from the range of values and is matched to a corresponding pre-determined pattern. The integrated circuit is subsequently operated with selected processing blocks disabled in accordance with the matching pre-determined pattern.
REFERENCES:
patent: 4531220 (1985-07-01), Brie et al.
patent: 4672665 (1987-06-01), Nagai et al.
patent: 4805215 (1989-02-01), Miller
patent: 4964118 (1990-10-01), Aly et al.
patent: 5157690 (1992-10-01), Buttle
patent: 5181228 (1993-01-01), Takatori
patent: 5255317 (1993-10-01), Arai et al.
patent: 5307405 (1994-04-01), Sih
patent: 5388092 (1995-02-01), Koyama et al.
patent: 5406613 (1995-04-01), Peponides et al.
patent: 5454511 (1995-10-01), Van Ostrand et al.
patent: 5455819 (1995-10-01), Sugiyama
patent: 5517435 (1996-05-01), Sugiyama
patent: 5526347 (1996-06-01), Chen et al.
patent: 5539773 (1996-07-01), Knee et al.
patent: 5604741 (1997-02-01), Samueli et al.
patent: 5617450 (1997-04-01), Kakuishi et al.
patent: 5659609 (1997-08-01), Koizumi et al.
patent: 5687229 (1997-11-01), Sih
patent: 5745564 (1998-04-01), Meek
patent: 5796725 (1998-08-01), Muraoka
patent: 5854717 (1998-12-01), Minuhin
patent: 5867486 (1999-02-01), Sugiyama
patent: 5933495 (1999-08-01), Oh
patent: 5940455 (1999-08-01), Ikeda
patent: 5946349 (1999-08-01), Raghunath
patent: 6304598 (2001-10-01), Agazzi et al.
patent: 6414990 (2002-07-01), Jonsson et al.
patent: 6477199 (2002-11-01), Agazzi et al.
patent: 2002/0037031 (2002-03-01), Agazzi et al.
patent: 2004/0219959 (2004-11-01), Khayrallah et al.
patent: WO 99/46867 (1999-09-01), None
IEEE Std 802.3ab-1999 (Supplement to IEEE Std 802.3, 1998 Edition), entitled Supplement to Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications- Physical Layer Parameters and Specifications for 1000 Mb/s Operation Over 4-Pair of Category 5 Balanced Copper Cabling, Type 1000BASE-T.
Nicol, et al., A Low-Power 128-Tap Digital Adaptive Equalizer for Broadband Modem, IEEE Journal of Solid-State Circuits, vol. 32, No. 11, Nov. 1997, pp. 1777-1789.
Agazzi Oscar E.
Creigh John L.
Hatamian Mehdi
Samueli Henry
Broadcom Corporation
Ha Dac V.
McAndrews Held & Malloy Ltd.
LandOfFree
Dynamic regulation of power consumption of a high-speed... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic regulation of power consumption of a high-speed..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic regulation of power consumption of a high-speed... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3983951