Dynamic reconfiguration of solid state memory device to...

Details Dynamic reconfiguration of solid state memory device to... Dynamic reconfiguration of solid state memory device to...

2005-01-14

2008-12-23

Ho, Duc C (Department: 2619)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C714S773000, C365S063000

Reexamination Certificate

active

07468993

ABSTRACT:
Multiple interfaces dedicated to individual logic circuits such as memory arrays are capable of being dynamically reconfigured from operating separately and in parallel to operating in a more collective manner to ensure that data associated with all of the logic circuits will be communicated irrespective of a failure in any of the interfaces. Specifically, a plurality of interfaces, each of which being ordinarily configured to communicate data associated with an associated logic circuit in parallel with the other interfaces, may be dynamically reconfigured, e.g., in response to a detected failure in one or more of the interfaces, to communicate data associated with each of the interfaces over each of at least a subset of the interfaces in a time multiplexed and replicated manner.

REFERENCES:
patent: 4357703 (1982-11-01), Van Brunt
patent: 2001/0018728 (2001-08-01), Topham et al.
patent: 2005/0149578 (2005-07-01), Sustman et al.

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