Patent
1987-03-02
1989-02-07
Carroll, J.
357 4, 357 6, 357 41, 357 51, 357 55, H01L 2978, H01L 4902, H01L 2702
Patent
active
048035351
ABSTRACT:
A dynamic random access memory having a trench capacitor includes: a semiconductor substrate; a trench formed in a semiconductor substrate; an insulating layer formed on an inner surface of the trench and having a bottom opening; a first conductive layer formed at the bottom opening position and on the insulating layer and the first conductive layer is ohmically connected to the semiconductor substrate at the bottom opening. The device includes further a dielectric layer formed on the first conductive layer; a second conductive layer formed on the dielectric layer so as to fill the trench, the first conductive layer, the dielectric layer, and the second conductive layer constituting a charge storage capacitor; and a MIS transistor formed in the semiconductor substrate, wherein the second conductive layer is ohmically connected to a source or drain region of the MIS transistor.
REFERENCES:
patent: 4327476 (1976-04-01), Iwai et al.
patent: 4397075 (1975-10-01), Fatula, Jr. et al.
patent: 4688063 (1987-08-01), Lu et al.
Carroll J.
Fujitus Limited
Ngo Ngan V.
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