Dynamic random access memory persistent page implemented as proc

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36523006, 36523001, 36523008, 36518905, 36518908, G11C 700

Patent

active

055196640

ABSTRACT:
The sense amplifier registers (SARs) servicing the arrays of a dynamic random access memory (DRAM) located on a semiconductor chip with a processor are all maintained at full power while unaccessed arrays are powered down to conserve power. Accessing circuits for the DRAM permit accessing by the processor of word length segments of each of the SARs independently of one another so that the SARs function as a read/write cache for the processor.

REFERENCES:
patent: 4577293 (1986-03-01), Matick et al.
patent: 4926385 (1990-05-01), Fujishima et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Dynamic random access memory persistent page implemented as proc does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic random access memory persistent page implemented as proc, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic random access memory persistent page implemented as proc will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2044437

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.