Dynamic random access memory having open bit line architecture

Details Dynamic random access memory having open bit line architecture Dynamic random access memory having open bit line architecture

1988-02-18

1989-12-19

Feras, Terrell W.

Static information storage and retrieval

Format or disposition of elements

36523001, G11C 1300

Patent

active

048887323

ABSTRACT:
A dynamic random access memory which includes a sense amplifier, first pair of bit lines extending in the opposite directions from the sense amplifier, second pair of bit lines extending in the opposite directions from the sense amplifier and disposed in parallel with the first pair of bit lines, a plurality of word lines disposed in a manner that the word lines perpendicularly intersect with the first and second pairs of bit lines, and a plurality of memory cells disposed at all intersecting points of the word lines and the first and second pairs of bit lines. Two bit lines selected from the first and second pairs of bit lines are coupled to the sense amplifier. Since two bit lines or two groups of memory cells can be disposed at one side of the sense amplifier, space efficiency can be highly improved without damaging the operating characteristics of a dynamic random access memory.

REFERENCES:
patent: 3402398 (1968-09-01), Keerner et al.
patent: 4025907 (1977-05-01), Karp et al.

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