Dynamic random access memory having bipolar and C-MOS transistor

Details Dynamic random access memory having bipolar and C-MOS transistor Dynamic random access memory having bipolar and C-MOS transistor

1996-08-27

1997-07-01

Nguyen, Tan T.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523008, G11C 800

Patent

active

056445482

ABSTRACT:
A dynamic random access memory device is provided having a dynamic memory cell, a word line coupled to the dynamic memory cell, a data line coupled to the dynamic memory cell, a precharge circuit coupled to the data line, a word driver coupled to the word line and a decoder coupled to the word driver. A plurality of address lines coupled to the decoder. The decoder has a first logic circuit whose inputs are connected to the plurality of address lines. The decoder also has a latch circuit whose input is connected to an output of the first logic circuit and whose output is connected to the word line.

REFERENCES:
patent: 3980899 (1976-09-01), Shimada
patent: 4514829 (1985-04-01), Chao
patent: 4611131 (1986-09-01), Shah
patent: 4618784 (1986-10-01), Chappell

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