Static information storage and retrieval – Interconnection arrangements
Patent
1994-11-23
1996-09-10
Limanek, Robert P.
Static information storage and retrieval
Interconnection arrangements
365 51, 365149, 257296, G11C 1300
Patent
active
055555195
ABSTRACT:
A dynamic random access memory device includes a semiconductor substrate, a plurality of parallel word lines on the substrate, and a plurality of pairs of bit lines transverse to the word lines on the substrate. An array of one-transistor memory cells are selectively arranged at the cross points as defined between the word lines and the bit lines. The array is subdivided into a plurality of subarray sections. A sense amplifier section is connected to the bit lines. The sense amplifier section includes first and second sense amplifier circuits. Adjacent bit-line pairs of the bit lines include a first bit-line pair and a second bit-line pair, one of which has a folded bit-line arrangement being included in a certain subarray section to be connected to the first sense amplifier circuit, and the other of which has an open bit-line arrangement that extends into the subarray section and another subarray section adjacent thereto, and is connected to the second sense amplifier circuit.
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Takashima Daisaburo
Watanabe Shigeyoshi
Kabushiki Kaisha Toshiba
Limanek Robert P.
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