Dynamic random access memory device having word line intermitten

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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36518911, 365226, G11C 800, G11C 700

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active

054635926

ABSTRACT:
A word line driver incorporated in a dynamic/random access memory device drives a word line over a power voltage level with a first pulse signal until development of potential differences indicative of data bits on bit line pairs and with a second pulse signal before restoring the data bits into memory cells, and the word line is maintained in a low voltage level between the first and second pulse signals so as to save electric power consumption.

REFERENCES:
patent: 4503522 (1985-03-01), Etoh et al.
patent: 5056062 (1991-10-01), Kuwabara et al.
patent: 5103113 (1992-04-01), Inui et al.
patent: 5257232 (1993-10-01), Dhong et al.
"CMOS Device Handbook", published by Nikkan Industry Newspaper Corporation with spot translation.

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