Dynamic random access memory device having sense amplifier array

Details Dynamic random access memory device having sense amplifier array Dynamic random access memory device having sense amplifier array

1993-09-30

1995-04-11

Popek, Joseph A.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 365 63, G11C 800

Patent

active

054065267

ABSTRACT:
A dynamic random access memory device selects a row of memory cells from a plurality of memory cell sub-arrays with main word lines and sub-word lines for a data access, and data bits read out from the row of memory cells are amplified by a sense amplifier circuit array, wherein a row block address decoder and a column block address decoder supply a first enable signal and a second enable signal to a row of memory cell sub-arrays and a column of memory cell sub-arrays so that only one of the sense amplifier circuit arrays is powered for the amplification, thereby decreasing peak current consumed by the sense amplifier circuit arrays.

REFERENCES:
patent: 4972373 (1990-11-01), Kim et al.
patent: 5267214 (1993-11-01), Fujishima et al.
patent: 5274597 (1993-12-01), Ohbayashi et al.

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