Patent
1988-03-21
1990-11-06
James, Andrew J.
357 234, 357 2311, 357 41, 357 51, 357 55, 357 59, H01L 2968, H01L 2906, H01L 2910
Patent
active
049690221
ABSTRACT:
A dynamic random access memory device including one-transistor type memory cells each having a trench capacitor is disclosed. An impurity region of a conductivity type opposite to the substrate and having a net-like plane shape is provided in an inner portion of the substrate, and the impurity region is led-out at a part to the major surface of the substrate. A trench is formed in the substrate from the major surface into the impurity region so that a wall section of the trench is constituted by the impurity region. A dielectric film of the capacitor is formed on the wall section, and a capacitor electrode is formed on the dielectric film and connected to source or drain region of the transistor.
REFERENCES:
patent: 4794434 (1988-12-01), Pelley, III
patent: 4801989 (1989-01-01), Taguchi
patent: 4803535 (1989-02-01), Taguchi
Inoue Yasukazu
Kotaki Hiroshi
Nishimoto Shozo
James Andrew J.
NEC Corporation
Ngo Ngan Van
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