Dynamic random access memory device fabricated with two kinds of

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357 2313, 357 41, 357 54, 357 51, H01L 2968, H01L 2906, H01L 2702, H01L 2934

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active

050831720

ABSTRACT:
A dynamic random access memory device comprises memory cells each implemented by a series combination of a switching transistor and a storage capacitor, peripheral circuits fabricated with component field effect transistors, and word lines coupled to the gate electrodes of the switching transistors, and the gate oxide film of each switching transistor is thicker than the gate oxide film of each component field effect transistor, wherein the word lines are coupled through an oxide film thinner than the gate oxide film of the switching transistor to an impurity region so that undersirable electric charges accumulated in the word lines during the fabrication process are discharged to the impurity region before any damages take place in the gate oxide films of the switching transistors.

REFERENCES:
patent: 4270262 (1981-06-01), Hori et al.
patent: 4543594 (1985-09-01), Mohsen et al.
patent: 4543597 (1985-09-01), Shibata

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