Dynamic random access memory cell with improved stacked capacito

Details Dynamic random access memory cell with improved stacked capacito Dynamic random access memory cell with improved stacked capacito

1990-05-24

1992-06-23

James, Andrew J.

357 51, H01L 2968

Patent

active

051247674

ABSTRACT:
A dynamic random access memory cell with a stacked capacitor comprises a switching transistor shifted between on and off states, an inter-level insulating film covering the switching transistor and having a contact window and a storage capacitor provided on the inter-level insulating film and coupled to the switching transistor through the contact window, and the storage capacitor includes a lower electrode having a generally convex top surface and a pug portion penetrating through the contact window so as to electrically connect with the switching transistor, a thin dielectric film covering the generally convex top surface of the lower electrode and an upper electrode formed on the thin dielectric film, since the thin dielectric film extends along the generally convex top surface, a conformal coverage takes place for producing uniform electric field across the thin dielectric film, thereby decreasing undesirable leakage current flowing between the lower and upper electrodes.

REFERENCES:
patent: 2885571 (1954-12-01), Williams et al.
patent: 3030704 (1957-08-01), Hall
patent: 3065391 (1961-01-01), Hall
patent: 4970564 (1990-11-01), Kimura et al.
Ben G. Streetman, Solid State Electronic Devices 1980, pp. 180.

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