Dynamic random access memory cell layout

Details Dynamic random access memory cell layout Dynamic random access memory cell layout

1999-09-29

2000-09-12

Elms, Richard

Static information storage and retrieval

Interconnection arrangements

365 51, 365149, G11C 506

Patent

active

06118683&

ABSTRACT:
A dynamic random access memory is formed in a silicon chip in arrays of clusters, each of four cells in a single active area. Each active area is cross-shaped with vertical trenches at the four ends of the two crossbars. The central region of the active area where the two crossbars intersect serves as the common base region of the four transistors of the cluster. The top of the base region serves as a common drain for the four transistors and each transistor has a separate channel along the wall of its associated vertical trench that provides its storage capacitor. Each cluster includes a common bit line and four separate word-line contacts.

REFERENCES:
patent: 5526303 (1996-06-01), Okajima
patent: 5569949 (1996-10-01), Malhi
patent: 5812443 (1998-09-01), Lee et al.
patent: 6051461 (2000-04-01), Lee et al.

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