Dynamic random access memory

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

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Details

365222, 365203, G11C 1300

Patent

active

057966710

ABSTRACT:
A DRAM that has an amplifier built into the cell, which gives the same output signal on the read bit line regardless of the size of the storage capacitor. The memory includes short bit line segments in the refresh mode with the provision of interconnecting the segments in the data input and output modes, where each bit line segment includes a separate amplifier circuit.

REFERENCES:
patent: 4044341 (1977-08-01), Stewart
patent: 5317212 (1994-05-01), Wahlstrom
patent: 5375086 (1994-12-01), Wahlstrom
patent: 5396452 (1995-03-01), Wahlstrom

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