Dynamic random access memory

Details Dynamic random access memory Dynamic random access memory

1991-04-29

1992-05-12

James, Andrew J.

357 236, 357 46, 357 51, H01L 2910, H01L 2978

Patent

active

051132354

ABSTRACT:
A dynamic random access memory cell comprises a transfer transistor and a trench structure on a semiconductor substrate. The trench structure includes a vertical transistor comprising a buried impurity diffusion layer, an insulation layer and an accumulation node layer. A potential level of the buried impurity diffusion layer is fixed at a high level. The accumulation node layer accumulates charges transferred through the transfer transistor which is at ON state. The vertical transistor becomes ON state when a potential level of the accumulation node layer is high, and becomes OFF state when a potential level of the accumulation node layer is low.

REFERENCES:
patent: 4964080 (1990-10-01), Tzeng
patent: 4969022 (1990-04-01), Nishimoto et al.
patent: 4999811 (1991-03-01), Bannerjce
patent: 5016068 (1991-05-01), Mori

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