Dynamic random access memory

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

29577R, 29578, 29589, 29590, 357 23, 357 51, 357 59, B01J 1700

Patent

active

042401950

ABSTRACT:
A memory in which each cell comprises an MOS transistor merged with a storage capacitor and in which the cells are arranged to permit adjacent pairs of transistors in a common column to share a common source and the transistors in a common row to share a common gate electrode conductor. The memory uses a first polycrystalline silicon layer which is patterned to provide interconnected storage electrodes and a second polycrystalline silicon layer which is patterned to provide a plurality of stripes to serve as the bit sense lines and a plurality of gate electrodes.

REFERENCES:
patent: 4012757 (1977-03-01), Koo
patent: 4031608 (1977-06-01), Togei

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