Dynamic ram with capacitor groove surrounding switching transist

Static information storage and retrieval – Magnetic bubbles – Guide structure

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357 2311, 357 50, 357 55, 357 59, 365149, H01L 2978

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active

047179422

ABSTRACT:
A semiconductor memory cell of a single field effect transistor and a single capacitor is surrounded or delimited at its three sides in the plan view by grooves formed in a semiconductor substrate. The capacitor in each memory cell is formed on one side wall surface or both side wall surfaces of this groove. With such construction, an increase in a capacitance can be achieved and a degree of circuit integration can be enhanced in distinction from the case where a groove is provided within an active region, that is, within a plan region of a capacitor section.

REFERENCES:
patent: 3901737 (1975-08-01), Dash
patent: 3961355 (1976-06-01), Abbas et al.
patent: 4345364 (1982-08-01), McElroy
patent: 4353086 (1982-10-01), Jaccodine et al.
G. Clarke et al., "Capacitor for Single Fet Memory Cell, " IBM Tech. Discl. Bull., vol. 17, #9, Feb. 1975, pp. 2579-2580.
Sunami et al., "A Corrugated Capacitor Cell (CCC) for Megabit Dynamic MOS Memories", Technical Digest of the International Electron Devices Meeting (IEDM), Dec. 13-15, 1982, pp. 806-808.

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