Dynamic RAM-and semiconductor device

Details Dynamic RAM-and semiconductor device Dynamic RAM-and semiconductor device

2007-05-22

2007-05-22

Dinh, Son (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S051000

Reexamination Certificate

active

10878266

ABSTRACT:
A semiconductor integrated circuit is provided which includes a first memory array including a plurality of first bit lines, a plurality of first word lines, and a plurality of first memory cells, the plurality of first memory cells being provided at intersections of the plurality of first bit lines and the plurality of first word lines. Each of the plurality of first bit lines has a first line and a second line connected with the first line via a first contact, in which the first line and the second line are formed of different layers from one another.

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