Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1996-07-12
1998-06-02
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Plural blocks or banks
36523006, 365 63, G11C 800
Patent
active
057611491
ABSTRACT:
A dynamic RAM is provided with a main word lines; a plurality of subsidiary word lines which are arranged in the direction of bit lines crossing the main word line and to which a plurality of dynamic memory cells are connected; a plurality of subsidiary word selection lines which are extended so as to perpendicularly intersect the main word line and through which a selection signal for selecting one of the plurality of subsidiary word lines is transmitted; and a logic circuit for receiving a selection signal from the main word line and a selection signal from each of the subsidiary word selection lines to thereby form a selection signal for selecting one of the subsidiary word lines. In the dynamic RAM, the voltage level of each of the main word line and the subsidiary word selection lines is made to be equal to the ground potential when the line is in a not-selected state.
REFERENCES:
patent: 4958326 (1990-09-01), Sakurai
patent: 5140550 (1992-08-01), Miyaoka et al.
patent: 5193074 (1993-03-01), Anami
patent: 5506816 (1996-04-01), Hirose et al.
Kenmizaki Kanehide
Komatsuzaki Katsuo
Makimura Chisa
Nakamura Masayuki
Saeki Makoto
Hitachi , Ltd.
Nguyen Tan T.
Texas Instruments Inc.
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