Dynamic process window control using simulated wet data from cur

Semiconductor device manufacturing: process – With measuring or testing

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438 15, H01L 2166

Patent

active

058664378

ABSTRACT:
A method of manufacturing semiconductor wafers using a simulation tool to determine predicted wafer electrical test measurements. The simulation tool combines in-line critical dimensions from previous from previous processes run on the current wafer lot, data from previous lots for processes subsequent to the process being run on the current lot and calibration simulation data obtained from the comparison of the predicted wafer electrical test measurements and collected wafer electrical test measurements taken from previous actual wafer electrical test measurements.

REFERENCES:
patent: 5637186 (1997-06-01), Liu et al.
patent: 5663076 (1997-09-01), Rostoker et al.
patent: 5716856 (1998-02-01), Lin et al.

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